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TOSHIBA
ENHANCES HIGH-PERFORMANCE MEMORY PORTFOLIO WITH SECOND GENERATION
FCRAM FAMILY FOR NETWORKING AND SERVER APPLICATIONS
Next
Generation of FCRAM Raises the Bar for High-Speed Memory Performance
IRVINE,
Calif., January 21, 2002-Committed to remain at the forefront
of specialized DRAM technology, Toshiba America Electronic
Components, Inc. (TAEC)* with its parent company, Toshiba
Corporation (Toshiba) today announced its second generation
Fast Cycle Random Access Memory (FCRAM) family of products.
The new devices feature performance enhancements over Toshiba's
previous generation of FCRAM devices, including faster access
time, shorter random cycle time and higher bandwidth. Designated
TC59LM806CFT and TC59LM814CFT, the newly-enhanced FCRAMs can
achieve fast performance up to 200 megahertz (MHz), a random
cycle time of 25 nanoseconds (ns) and bandwidth of 400 megabits
per second (Mbps). These features make them ideal for high-speed
networking, network servers, switches and routers, and Internet
server applications.
"Toshiba
is dedicated to maintaining a strong presence in the memory
business and to supporting the increasing performance requirements
of our customers," said Naohisa Sano, vice president of TAEC's
memory business unit. "This announcement demonstrates our
commitment and determination to remain a leading solutions
provider for next generation applications."
Toshiba's
FCRAM products combine DRAM densities with random cycle performance
approaching Static Random Access Memory (SRAM) speeds. By
design, FCRAM architecture offers short random access and
cycle times, and high bandwidth combined with a conventional
Double
Data Rate (DDR) interface using more cost-effective DRAM technology.
In contrast to this super-fast second generation family of
FCRAMs, Toshiba's first generation FCRAM devices offer a random
cycle time of 32.5ns and a bandwidth of 308Mbps.
"Emerging
applications from the dynamic networking and communications
markets are constantly requiring higher levels of performance
and speed, thereby calling for ongoing evolution in DRAM technology,"
said Brian Kumagai, manager of business development for DRAM
products at TAEC. "As witness to this demand, many customers
who have incorporated our powerful first generation FCRAMs
into their designs are already anxiously awaiting the release
of the faster second generation devices for use in future
applications."
"As
engineers craft faster and faster network computing, PC server
and high performance communications systems, they are looking
for faster and faster memory architectures," said Richard
Doherty, research director at The Envisioneering Group. "With
their second generation FCRAM, Toshiba has cleverly extended
their initial family to 200 MHz bus speeds, while maintaining
the same 2.5 volt power efficiencies and DDR RAM pin compatibility."
The
new devices offer low power consumption of 2.5 volts (V) by
narrowing memory active areas. They incorporate a proprietary
core technology for achieving fast random access cycle times.
To meet specific application requirements, Toshiba's FCRAMs
are available with different functions including variable
write length. Pinout and I/O interface are compatible with
standard DDR Synchronous Dynamic Random Access Memories (SDRAMs).
Additional
Features
- Low
latency
- Advanced
0.175 micron (µm) process technology
- Uses
a differential receiver for clock signal
- Available
in x8 and x16 configurations
- Electrically
selectable data input/output driver strength
- Housed
in a TSOP2 package
Technical
Specifications: TC59LM814CFT and TC59LM806CFT
| |
-50
|
-55
|
-60
|
| Clock
Cycle Time (CL = 3) |
5.5ns
|
6ns
|
6.5ns
|
| Clock
Cycle Time (CL = 4) |
5ns
|
5.5ns
|
6ns
|
| Random
Read/Write Cycle Time (min.) at CL = 3 |
25ns
|
27.5ns
|
30ns
|
| Random
Read/Write Cycle Time (min.) at CL = 4 |
25ns
|
27.5ns
|
30ns
|
| Random
Access Time (max.) at CL = 3 |
22ns
|
24ns
|
26ns
|
| Random
Access Time (max.) at CL = 4 |
22ns
|
24ns
|
26ns
|
| Operating
Current - Single Bank (max.) |
190
milliamperes (mA)
|
180mA
|
170mA
|
| Power
Down Current (max.) |
2mA
|
2mA
|
2mA
|
| Self-Refresh
Current (max.) |
3mA
|
3mA
|
3mA
|
Pricing
and Availability
Samples of Toshiba's second generation FCRAMs are planned
to become available in February 2002, priced at US$60 each.
Full production is scheduled for the second quarter of 2002.
The new devices will be produced at Toshiba's advanced manufacturing
facility at Yokkaichi, Japan. Advanced simulation models are
available immediately from Denali at: http://www.ememory.com/Toshiba-FCRAM.
About
Toshiba's FCRAM
Jointly developed with Fujitsu Limited, FCRAMs offer lower
power consumption by narrowing the memory active areas and
incorporate a proprietary core technology that achieves fast
random access. The FCRAM solution excels in applications where
DRAM densities with random cycle performance approaching SRAM
speeds are needed.
Toshiba's
FCRAMs offer designers many advantages including favorable
cost versus performance. Incorporating FCRAM into the memory
subsystem of a product can also improve system performance
by enabling more searches per second without major architectural
changes in the traditional CPU and memory subsystem interfaces.
The devices' fast cycle times enable them to find stored data
more quickly, offering a superior alternative to engineers
looking to replace content addressable memory.
FCRAM
System Solution
Toshiba also offers several design guides to help engineers
and system architects in easily identifying the key advantages
of FCRAM technology for high-performance networking applications.
"As
part of our overall approach to provide complete system solutions
to our customers, we have developed a paper design of an FCRAM
controller, which enables system designers and architects
to jump start their FCRAM controller design and development
process," according to Farhad Mafie, vice president of systems
application engineering and market development for TAEC.
The
controller has been written in Verilog. Interested parties
can acquire this design file and all of the related documentation
through a simple registration at: http://www.fcram.toshiba.com.
About
Denali FCRAM Support Products
The new FCRAM devices are supported by advanced simulation
models developed in cooperation with Toshiba and Denali Software,
Inc., a world leader in high-performance memory subsystem
design and verification. These Specification of Memory Architecture
(SOMA) files are used to simulate the detailed timing and
behavior of the memory devices during the design and verification
of new systems. Toshiba has also worked closely with Denali
to ensure that the latest FCRAM devices deliver optimum performance
via Denali's Databahn product for designing high-performance
memory controllers. Denali's FCRAM controller design tool
is configurable and produces Verilog for a wide variety of
FCRAM memory systems. For more information about Denali, please
visit: http://www.denali.com.
About
TAEC
TAEC offers the industry's broadest line-up of semiconductor,
display and storage solutions for the computing, wireless,
networking and digital consumer markets. Combining quality
and flexibility with design engineering expertise, TAEC brings
advanced next-generation technologies to its OEM customers.
TAEC
is an independent operating company owned by Toshiba America
Inc., a subsidiary of the $47.9 billion (FY 2000 recorded
sales) Toshiba Corporation, the second largest semiconductor
company worldwide in terms of global sales for the year 2000.
Toshiba is a world leader in high-technology products with
more than 300 major subsidiaries and affiliates worldwide.
For additional company and product information, please visit
TAEC's web site at: http://www.toshiba.com/taec.
TO-184
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